diff --git a/arch/arm/configs/4g-iot_linux_defconfig b/arch/arm/configs/4g-iot_linux_defconfig index 7f741c3f..9ba010c3 100644 --- a/arch/arm/configs/4g-iot_linux_defconfig +++ b/arch/arm/configs/4g-iot_linux_defconfig @@ -43,7 +43,7 @@ CONFIG_KERNEL_GZIP=y # CONFIG_KERNEL_LZ4 is not set CONFIG_DEFAULT_HOSTNAME="(none)" CONFIG_SWAP=y -# CONFIG_SYSVIPC is not set +CONFIG_SYSVIPC=y # CONFIG_POSIX_MQUEUE is not set CONFIG_CROSS_MEMORY_ATTACH=y CONFIG_FHANDLE=y @@ -539,30 +539,30 @@ CONFIG_WAKELOCK=y CONFIG_HIBERNATE_CALLBACKS=y CONFIG_HIBERNATION=y CONFIG_PM_STD_PARTITION="" -CONFIG_TOI_CORE=y +# CONFIG_TOI_CORE is not set # # Image Storage (you need at least one allocator) # # CONFIG_TOI_FILE is not set -CONFIG_TOI_SWAP=y +# CONFIG_TOI_SWAP is not set # # General Options # -CONFIG_TOI_CRYPTO=y +# CONFIG_TOI_CRYPTO is not set CONFIG_TOI_DEFAULT_IMAGE_SIZE_LIMIT=-2 # CONFIG_TOI_KEEP_IMAGE is not set # # No incremental image support available without Keep Image support. # -CONFIG_TOI_REPLACE_SWSUSP=y +# CONFIG_TOI_REPLACE_SWSUSP is not set # CONFIG_TOI_IGNORE_LATE_INITCALL is not set CONFIG_TOI_DEFAULT_WAIT=2 CONFIG_TOI_DEFAULT_EXTRA_PAGES_ALLOWANCE=2000 # CONFIG_TOI_CHECKSUM is not set -CONFIG_TOI=y +# CONFIG_TOI is not set CONFIG_TOI_ZRAM_SUPPORT=y CONFIG_TOI_FIXUP=y CONFIG_TOI_ENHANCE=y @@ -1331,7 +1331,8 @@ CONFIG_MTK_GPU_COMMON_DVFS_SUPPORT=y CONFIG_MTK_MMPROFILE_SUPPORT=y CONFIG_MMPROFILE=y CONFIG_MTK_LCM=y -CONFIG_CUSTOM_KERNEL_LCM="st7703_hd720_dsi_vdo_boe nt35521_hd720_dsi_vdo_cmi_tps65132" +# CONFIG_CUSTOM_KERNEL_LCM "st7703_hd720_dsi_vdo_boe nt35521_hd720_dsi_vdo_cmi_tps65132" +CONFIG_CUSTOM_KERNEL_LCM="jd9522_hd720_dsi_vdo_qc" # CONFIG_MTK_LCM_DEVICE_TREE_SUPPORT is not set CONFIG_MTK_FB=y CONFIG_MTK_VIDEOX=y @@ -1877,7 +1878,7 @@ CONFIG_INPUT_UINPUT=y # Character devices # CONFIG_TTY=y -# CONFIG_VT is not set +CONFIG_VT=y CONFIG_UNIX98_PTYS=y # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set CONFIG_LEGACY_PTYS=y @@ -3181,7 +3182,7 @@ CONFIG_PSTORE_MEM_ADDR=0x43F10000 CONFIG_PSTORE_MEM_SIZE=0xe0000 # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set -# CONFIG_F2FS_FS is not set +CONFIG_F2FS_FS=y # CONFIG_NETWORK_FILESYSTEMS is not set CONFIG_NLS=y CONFIG_NLS_DEFAULT="iso8859-1" diff --git a/drivers/misc/mediatek/lcm/jd9365_hd720_dsi/Makefile b/drivers/misc/mediatek/lcm/jd9365_hd720_dsi/Makefile new file mode 100644 index 00000000..4249754b --- /dev/null +++ b/drivers/misc/mediatek/lcm/jd9365_hd720_dsi/Makefile @@ -0,0 +1,20 @@ +# +# Copyright (C) 2015 MediaTek Inc. +# +# This program is free software: you can redistribute it and/or modify +# it under the terms of the GNU General Public License version 2 as +# published by the Free Software Foundation. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +# +# Makefile for misc devices that really don't fit anywhere else. +# + +obj-y += jd9365_hd720_dsi.o + +ccflags-$(CONFIG_MTK_LCM) += -I$(srctree)/drivers/misc/mediatek/lcm/inc diff --git a/drivers/misc/mediatek/lcm/jd9365_hd720_dsi/jd9365_hd720_dsi.c b/drivers/misc/mediatek/lcm/jd9365_hd720_dsi/jd9365_hd720_dsi.c new file mode 100644 index 00000000..51ee0394 --- /dev/null +++ b/drivers/misc/mediatek/lcm/jd9365_hd720_dsi/jd9365_hd720_dsi.c @@ -0,0 +1,799 @@ +/* + * Copyright (C) 2015 MediaTek Inc. + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifdef BUILD_LK +#include +#include +#include +#include +#include +#include +#elif defined(BUILD_UBOOT) +#include +#else +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#endif + +#ifdef CONFIG_OF +#include +#endif + +#include "lcm_drv.h" + +#ifndef BUILD_LK +static struct regulator *lcm_vgp; +static unsigned int LCD_RST_PIN; +static unsigned int LCD_PWR_EN_PIN; +static unsigned int LCD_PWR_BIAS_ENP_PIN; + +/* get LDO supply */ +static int lcm_get_vgp_supply(struct device *dev) +{ + int ret; + struct regulator *lcm_vgp_ldo; + + pr_debug("LCM: lcm_get_vgp_supply is going\n"); + + lcm_vgp_ldo = devm_regulator_get(dev, "reg-lcm"); + if (IS_ERR(lcm_vgp_ldo)) { + ret = PTR_ERR(lcm_vgp_ldo); + pr_debug("failed to get reg-lcm LDO\n"); + return ret; + } + + pr_debug("LCM: lcm get supply ok.\n"); + + /* get current voltage settings */ + ret = regulator_get_voltage(lcm_vgp_ldo); + pr_debug("lcm LDO voltage = %d in LK stage\n", ret); + + lcm_vgp = lcm_vgp_ldo; + + return ret; +} + +int lcm_vgp_supply_enable(void) +{ + int ret; + unsigned int volt; + + pr_debug("LCM: lcm_vgp_supply_enable\n"); + + if (lcm_vgp == NULL) + return 0; + + pr_debug("LCM: set regulator voltage lcm_vgp voltage to 1.8V\n"); + /* set voltage to 1.8V */ + ret = regulator_set_voltage(lcm_vgp, 1800000, 1800000); + if (ret != 0) { + pr_debug("LCM: lcm failed to set lcm_vgp voltage\n"); + return ret; + } + + /* get voltage settings again */ + volt = regulator_get_voltage(lcm_vgp); + if (volt == 1800000) + pr_debug("LCM: check regulator voltage=1800000 pass!\n"); + else + pr_debug("LCM: check regulator voltage=1800000 fail! (voltage: %d)\n", volt); + + ret = regulator_enable(lcm_vgp); + if (ret != 0) { + pr_debug("LCM: Failed to enable lcm_vgp\n"); + return ret; + } + + return ret; +} + +int lcm_vgp_supply_disable(void) +{ + int ret = 0; + unsigned int isenable; + + if (lcm_vgp == NULL) + return 0; + + /* disable regulator */ + isenable = regulator_is_enabled(lcm_vgp); + + pr_debug("LCM: lcm query regulator enable status[%d]\n", isenable); + + if (isenable) { + ret = regulator_disable(lcm_vgp); + if (ret != 0) { + pr_debug("LCM: lcm failed to disable lcm_vgp\n"); + return ret; + } + /* verify */ + isenable = regulator_is_enabled(lcm_vgp); + if (!isenable) + pr_debug("LCM: lcm regulator disable pass\n"); + } + + return ret; +} + +void lcm_request_gpio_control(struct device *dev) +{ + LCD_RST_PIN = of_get_named_gpio(dev->of_node, "lcd_rst_pin", 0); + gpio_request(LCD_RST_PIN, "LCD_RST_PIN"); + + LCD_PWR_EN_PIN = of_get_named_gpio(dev->of_node, "lcd_pwr_en_pin", 0); + gpio_request(LCD_PWR_EN_PIN, "LCD_PWR_EN_PIN"); + + LCD_PWR_BIAS_ENP_PIN = of_get_named_gpio(dev->of_node, "lcd_pwr_bias_enp_pin", 0); + gpio_request(LCD_PWR_BIAS_ENP_PIN, "LCD_PWR_BIAS_ENP_PIN"); +} + +static int lcm_driver_probe(struct device *dev, void const *data) +{ + lcm_request_gpio_control(dev); + lcm_get_vgp_supply(dev); + lcm_vgp_supply_enable(); + + return 0; +} + +static const struct of_device_id lcm_platform_of_match[] = { + { + .compatible = "jdi,jd9365_dsi_vdo", + .data = 0, + }, { + /* sentinel */ + } +}; + +MODULE_DEVICE_TABLE(of, platform_of_match); + +static int lcm_platform_probe(struct platform_device *pdev) +{ + const struct of_device_id *id; + + id = of_match_node(lcm_platform_of_match, pdev->dev.of_node); + if (!id) + return -ENODEV; + + return lcm_driver_probe(&pdev->dev, id->data); +} + +static struct platform_driver lcm_driver = { + .probe = lcm_platform_probe, + .driver = { + .name = "jd9365_dsi_vdo", + .owner = THIS_MODULE, + .of_match_table = lcm_platform_of_match, + }, +}; + +static int __init lcm_init(void) +{ + if (platform_driver_register(&lcm_driver)) { + pr_debug("LCM: failed to register this driver!\n"); + return -ENODEV; + } + + return 0; +} + +static void __exit lcm_exit(void) +{ + platform_driver_unregister(&lcm_driver); +} + +late_initcall(lcm_init); +module_exit(lcm_exit); +MODULE_AUTHOR("mediatek"); +MODULE_DESCRIPTION("LCM display subsystem driver"); +MODULE_LICENSE("GPL"); +#endif + +/* --------------------------------------------------------------------------- */ +/* Local Constants */ +/* --------------------------------------------------------------------------- */ +#define LCM_DSI_CMD_MODE 0 +#define FRAME_WIDTH (720) +#define FRAME_HEIGHT (1280) + +#define GPIO_OUT_ONE 1 +#define GPIO_OUT_ZERO 0 + +#ifdef GPIO_LCM_RST +#define GPIO_LCD_RST GPIO_LCM_RST +#endif + +#ifdef GPIO_LCM_PWR_EN +#define GPIO_LCD_PWR_EN GPIO_LCM_PWR_EN +#else +#define GPIO_LCD_PWR_EN 0xFFFFFFFF +#endif + +//#ifdef GPIO_LCD_BIAS_ENP_PIN +//#define GPIO_LCD_BIAS_ENP GPIO_LCD_BIAS_ENP_PIN +//#endif + +static LCM_UTIL_FUNCS lcm_util; + +#define SET_RESET_PIN(v) (lcm_util.set_reset_pin((v))) + +#define UDELAY(n) (lcm_util.udelay(n)) +#define MDELAY(n) (lcm_util.mdelay(n)) + +/* --------------------------------------------------------------------------- */ +/* Local Functions */ +/* --------------------------------------------------------------------------- */ +#define dsi_set_cmdq_V2(cmd, count, ppara, force_update) lcm_util.dsi_set_cmdq_V2(cmd, count, ppara, force_update) +#define dsi_set_cmdq(pdata, queue_size, force_update) lcm_util.dsi_set_cmdq(pdata, queue_size, force_update) +#define wrtie_cmd(cmd) lcm_util.dsi_write_cmd(cmd) +#define write_regs(addr, pdata, byte_nums) lcm_util.dsi_write_regs(addr, pdata, byte_nums) +#define read_reg(cmd) lcm_util.dsi_dcs_read_lcm_reg(cmd) +#define read_reg_v2(cmd, buffer, buffer_size) lcm_util.dsi_dcs_read_lcm_reg_v2(cmd, buffer, buffer_size) +/* --------------------------------------------------------------------------- */ +/* Local Constants */ +/* --------------------------------------------------------------------------- */ +#define REGFLAG_DELAY 0xFC +#define REGFLAG_END_OF_TABLE 0xFD /* END OF REGISTERS MARKER */ + +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef FALSE +#define FALSE 0 +#endif + +/* --------------------------------------------------------------------------- */ +/* Local Variables */ +/* --------------------------------------------------------------------------- */ +static void lcm_set_gpio_output(unsigned int GPIO, unsigned int output) +{ + if (GPIO == 0xFFFFFFFF) { +#ifdef BUILD_LK + printf("[LK/LCM] GPIO_LCD_PWR_EN = 0x%x\n", GPIO_LCD_PWR_EN); +// printf("[LK/LCM] GPIO_LCD_BIAS_ENP_PIN = 0x%x\n", GPIO_LCD_BIAS_ENP_PIN); + printf("[LK/LCM] GPIO_LCM_RST = 0x%x\n", GPIO_LCD_RST); +#else + pr_debug("[Kernel/LCM] GPIO_LCD_PWR_EN = 0x%x\n", LCD_PWR_EN_PIN); +// pr_debug("[Kernel/LCM] GPIO_LCD_BIAS_ENP_PIN = 0x%x\n", LCD_PWR_BIAS_ENP_PIN); + pr_debug("[Kernel/LCM] GPIO_LCM_RST = 0x%x\n", LCD_RST_PIN); +#endif + return; + } +#ifdef BUILD_LK + mt_set_gpio_mode(GPIO, GPIO_MODE_00); + mt_set_gpio_dir(GPIO, GPIO_DIR_OUT); + mt_set_gpio_out(GPIO, (output > 0) ? GPIO_OUT_ONE : GPIO_OUT_ZERO); +#else + gpio_direction_output(GPIO, output); + gpio_set_value(GPIO, output); +#endif +} + +struct LCM_setting_table { + unsigned char cmd; + unsigned char count; + unsigned char para_list[64]; +}; + +#ifndef BUILD_LK +static struct LCM_setting_table lcm_suspend_setting[] = { + {0x28, 0, {} }, + {0x10, 0, {} }, + {REGFLAG_DELAY, 120, {} }, + {REGFLAG_END_OF_TABLE, 0x00, {} } +}; +#endif + +static struct LCM_setting_table lcm_initialization_setting[] = { + {0xE0, 1, {0x00} }, + + {0xE1, 1, {0x93} }, + {0xE2, 1, {0x65} }, + {0xE3, 1, {0xF8} }, + + {0xE0, 1, {0x04} }, + {0x2D, 1, {0x03} }, + {0xE0, 1, {0x00} }, + + {0x70, 1, {0x10} }, + {0x71, 1, {0x13} }, + {0x72, 1, {0x06} }, + {0x75, 1, {0x03} }, + {0x80, 1, {0x03} }, + + {0xE0, 1, {0x01} }, + + {0x00, 1, {0x00} }, + {0x01, 1, {0xB5} }, + {0x03, 1, {0x00} }, + {0x04, 1, {0xA0} }, + + {0x0A, 1, {0x07} }, + {0x0C, 1, {0x74} }, + + {0x17, 1, {0x00} }, + {0x18, 1, {0xD7} }, + {0x19, 1, {0x01} }, + {0x1A, 1, {0x00} }, + {0x1B, 1, {0xD7} }, + {0x1C, 1, {0x01} }, + + {0x1F, 1, {0x74} }, + {0x20, 1, {0x19} }, + {0x21, 1, {0x19} }, + {0x22, 1, {0x0E} }, + {0x27, 1, {0x43} }, + + {0x37, 1, {0x09} }, + {0x38, 1, {0x04} }, + {0x39, 1, {0x08} }, + {0x3A, 1, {0x18} }, + {0x3B, 1, {0x18} }, + {0x3C, 1, {0x72} }, + {0x3E, 1, {0xFF} }, + {0x3E, 1, {0xFF} }, + {0x3F, 1, {0xFF} }, + + {0x40, 1, {0x04} }, + {0x41, 1, {0xA0} }, + + {0x43, 1, {0x08} }, + {0x44, 1, {0x07} }, + {0x45, 1, {0x30} }, + + {0x55, 1, {0x01} }, + {0x56, 1, {0x01} }, + {0x57, 1, {0x65} }, + {0x58, 1, {0x0A} }, + {0x59, 1, {0x0A} }, + {0x5A, 1, {0x28} }, + {0x5B, 1, {0x0F} }, + + {0x5D, 1, {0x7C} }, + {0x5E, 1, {0x5F} }, + {0x5F, 1, {0x4D} }, + {0x60, 1, {0x3F} }, + {0x61, 1, {0x39} }, + {0x62, 1, {0x29} }, + {0x63, 1, {0x2B} }, + {0x64, 1, {0x12} }, + {0x65, 1, {0x28} }, + {0x66, 1, {0x24} }, + {0x67, 1, {0x22} }, + {0x68, 1, {0x3E} }, + {0x69, 1, {0x2C} }, + {0x6A, 1, {0x33} }, + {0x6B, 1, {0x26} }, + {0x6C, 1, {0x23} }, + {0x6D, 1, {0x18} }, + {0x6E, 1, {0x09} }, + {0x6F, 1, {0x00} }, + + {0x70, 1, {0x7C} }, + {0x71, 1, {0x5F} }, + {0x72, 1, {0x4D} }, + {0x73, 1, {0x3F} }, + {0x74, 1, {0x39} }, + {0x75, 1, {0x29} }, + {0x76, 1, {0x2B} }, + {0x77, 1, {0x12} }, + {0x78, 1, {0x28} }, + {0x79, 1, {0x24} }, + {0x7A, 1, {0x22} }, + {0x7B, 1, {0x3E} }, + {0x7C, 1, {0x2C} }, + {0x7D, 1, {0x33} }, + {0x7E, 1, {0x26} }, + {0x7F, 1, {0x23} }, + {0x80, 1, {0x18} }, + {0x81, 1, {0x09} }, + {0x82, 1, {0x00} }, + + {0xE0, 1, {0x02} }, + {0x00, 1, {0x37} }, + {0x01, 1, {0x17} }, + {0x02, 1, {0x0A} }, + {0x03, 1, {0x06} }, + {0x04, 1, {0x08} }, + {0x05, 1, {0x04} }, + {0x06, 1, {0x00} }, + {0x07, 1, {0x1F} }, + {0x08, 1, {0x1F} }, + {0x09, 1, {0x1F} }, + {0x0A, 1, {0x1F} }, + {0x0B, 1, {0x1F} }, + {0x0C, 1, {0x1F} }, + {0x0D, 1, {0x1F} }, + {0x0E, 1, {0x1F} }, + {0x0F, 1, {0x1F} }, + {0x10, 1, {0x3F} }, + {0x11, 1, {0x1F} }, + {0x12, 1, {0x1F} }, + {0x13, 1, {0x1E} }, + {0x14, 1, {0x10} }, + {0x15, 1, {0x1F} }, + + {0x16, 1, {0x37} }, + {0x17, 1, {0x17} }, + {0x18, 1, {0x0B} }, + {0x19, 1, {0x07} }, + {0x1A, 1, {0x09} }, + {0x1B, 1, {0x05} }, + {0x1C, 1, {0x01} }, + {0x1D, 1, {0x1F} }, + {0x1E, 1, {0x1F} }, + {0x1F, 1, {0x1F} }, + {0x20, 1, {0x1F} }, + {0x21, 1, {0x1F} }, + {0x22, 1, {0x1F} }, + {0x23, 1, {0x1F} }, + {0x24, 1, {0x1F} }, + {0x25, 1, {0x1F} }, + {0x26, 1, {0x1F} }, + {0x27, 1, {0x1F} }, + {0x28, 1, {0x1F} }, + {0x29, 1, {0x1E} }, + {0x2A, 1, {0x11} }, + {0x2B, 1, {0x1F} }, + + {0x2C, 1, {0x37} }, + {0x2D, 1, {0x17} }, + {0x2E, 1, {0x05} }, + {0x2F, 1, {0x09} }, + {0x30, 1, {0x07} }, + {0x31, 1, {0x0B} }, + {0x32, 1, {0x11} }, + {0x33, 1, {0x1F} }, + {0x34, 1, {0x1F} }, + {0x35, 1, {0x1F} }, + {0x36, 1, {0x1F} }, + {0x37, 1, {0x1F} }, + {0x38, 1, {0x1F} }, + {0x39, 1, {0x1F} }, + {0x3A, 1, {0x1F} }, + {0x3B, 1, {0x1F} }, + {0x3C, 1, {0x3F} }, + {0x3D, 1, {0x1F} }, + {0x3E, 1, {0x1E} }, + {0x3F, 1, {0x1F} }, + {0x40, 1, {0x01} }, + {0x41, 1, {0x1F} }, + + {0x42, 1, {0x38} }, + {0x43, 1, {0x18} }, + {0x44, 1, {0x04} }, + {0x45, 1, {0x08} }, + {0x46, 1, {0x06} }, + {0x47, 1, {0x0A} }, + {0x48, 1, {0x10} }, + {0x49, 1, {0x1F} }, + {0x4A, 1, {0x1F} }, + {0x4B, 1, {0x1F} }, + {0x4C, 1, {0x1F} }, + {0x4D, 1, {0x1F} }, + {0x4E, 1, {0x1F} }, + {0x4F, 1, {0x1F} }, + {0x50, 1, {0x1F} }, + {0x51, 1, {0x1F} }, + {0x52, 1, {0x1F} }, + {0x53, 1, {0x1F} }, + {0x54, 1, {0x1E} }, + {0x55, 1, {0x1F} }, + {0x56, 1, {0x00} }, + {0x57, 1, {0x1F} }, + + {0x58, 1, {0x10} }, + {0x59, 1, {0x00} }, + {0x5A, 1, {0x00} }, + {0x5B, 1, {0x10} }, + {0x5C, 1, {0x01} }, + {0x5D, 1, {0x50} }, + {0x5E, 1, {0x01} }, + {0x5F, 1, {0x02} }, + {0x60, 1, {0x30} }, + {0x61, 1, {0x01} }, + {0x62, 1, {0x02} }, + {0x63, 1, {0x06} }, + {0x64, 1, {0x6A} }, + {0x65, 1, {0x55} }, + {0x66, 1, {0x08} }, + {0x67, 1, {0x73} }, + {0x68, 1, {0x05} }, + {0x69, 1, {0x08} }, + {0x6A, 1, {0x6E} }, + {0x6B, 1, {0x00} }, + {0x6C, 1, {0x00} }, + {0x6D, 1, {0x00} }, + {0x6E, 1, {0x00} }, + {0x6F, 1, {0x88} }, + {0x70, 1, {0x00} }, + {0x71, 1, {0x00} }, + {0x72, 1, {0x06} }, + {0x73, 1, {0x7B} }, + {0x74, 1, {0x00} }, + {0x75, 1, {0x80} }, + {0x76, 1, {0x00} }, + {0x77, 1, {0x0D} }, + {0x78, 1, {0x18} }, + {0x79, 1, {0x00} }, + {0x7A, 1, {0x00} }, + {0x7B, 1, {0x00} }, + {0x7C, 1, {0x00} }, + {0x7D, 1, {0x03} }, + {0x7E, 1, {0x7B} }, + {0xE0, 1, {0x04} }, + {0x04, 1, {0x01} }, + {0x0E, 1, {0x38} }, + {0x2B, 1, {0x2B} }, + {0x2E, 1, {0x44} }, + {0xE0, 1, {0x00} }, + {0xE6, 1, {0x02} }, + {0xE6, 1, {0x02} }, + + {0x11, 0, {} }, + {REGFLAG_DELAY, 120, {} }, + {0x29, 0, {} }, + {REGFLAG_DELAY, 5, {} }, + + {0x35, 1, {0x00} }, + {REGFLAG_END_OF_TABLE, 0x00, {} } +}; + +static void dsi_send_cmdq_tinno(unsigned cmd, unsigned char count, unsigned char *para_list, + unsigned char force_update) +{ + unsigned int item[16]; + unsigned char dsi_cmd = (unsigned char)cmd; + unsigned char dc; + int index = 0, length = 0; + + memset(item, 0, sizeof(item)); + if (count + 1 > 60) + return; + + if (count == 0) { + item[0] = 0x0500 | (dsi_cmd << 16); + length = 1; + } else if (count == 1) { + item[0] = 0x1500 | (dsi_cmd << 16) | (para_list[0] << 24); + length = 1; + } else { + item[0] = 0x3902 | ((count + 1) << 16); /* Count include command. */ + ++length; + while (1) { + if (index == count + 1) + break; + if (index == 0) + dc = cmd; + else + dc = para_list[index - 1]; + /* an item make up of 4data. */ + item[index / 4 + 1] |= (dc << (8 * (index % 4))); + if (index % 4 == 0) + ++length; + ++index; + } + } + + dsi_set_cmdq(item, length, force_update); +} + + +static void push_table(struct LCM_setting_table *table, unsigned int count, + unsigned char force_update) +{ + unsigned int i; + unsigned cmd; + + for (i = 0; i < count; i++) { + cmd = table[i].cmd; + switch (cmd) { + case REGFLAG_DELAY: + MDELAY(table[i].count); + break; + + case REGFLAG_END_OF_TABLE: + break; + + default: + dsi_send_cmdq_tinno(cmd, table[i].count, table[i].para_list, force_update); + /* dsi_set_cmdq_V2(cmd, table[i].count, table[i].para_list, force_update); */ + } + } +} + +static void init_lcm_registers(void) +{ + push_table(lcm_initialization_setting, + sizeof(lcm_initialization_setting) / sizeof(struct LCM_setting_table), 1); +} + +/* --------------------------------------------------------------------------- */ +/* LCM Driver Implementations */ +/* --------------------------------------------------------------------------- */ +static void lcm_set_util_funcs(const LCM_UTIL_FUNCS *util) +{ + memcpy(&lcm_util, util, sizeof(LCM_UTIL_FUNCS)); +} + +static void lcm_get_params(LCM_PARAMS *params) +{ + memset(params, 0, sizeof(LCM_PARAMS)); + + params->type = LCM_TYPE_DSI; + + params->width = FRAME_WIDTH; + params->height = FRAME_HEIGHT; +// params->density = 213; + +#if (LCM_DSI_CMD_MODE) + params->dsi.mode = CMD_MODE; +#else + params->dsi.mode = SYNC_PULSE_VDO_MODE; +#endif + + /* DSI */ + /* Command mode setting */ + params->dsi.LANE_NUM = LCM_FOUR_LANE; + /* The following defined the fomat for data coming from LCD engine. */ + params->dsi.data_format.color_order = LCM_COLOR_ORDER_RGB; + params->dsi.data_format.trans_seq = LCM_DSI_TRANS_SEQ_MSB_FIRST; + params->dsi.data_format.padding = LCM_DSI_PADDING_ON_LSB; + params->dsi.data_format.format = LCM_DSI_FORMAT_RGB888; + + params->dsi.intermediat_buffer_num = 2; + params->dsi.PS = LCM_PACKED_PS_24BIT_RGB888; + +#ifdef BUILD_LK + params->dsi.esd_check_enable = 1; + params->dsi.customization_esd_check_enable = 1; + params->dsi.lcm_esd_check_table[0].cmd = 0x0A; + params->dsi.lcm_esd_check_table[0].count = 1; + params->dsi.lcm_esd_check_table[0].para_list[0] = 0x9c; +#endif + params->dsi.vertical_sync_active = 4; + params->dsi.vertical_backporch = 4; + params->dsi.vertical_frontporch = 16; + params->dsi.vertical_active_line = FRAME_HEIGHT; + + params->dsi.horizontal_sync_active = 55; + params->dsi.horizontal_backporch = 53; + params->dsi.horizontal_frontporch = 24; + params->dsi.horizontal_active_pixel = FRAME_WIDTH; + + /* video mode timing */ + params->dsi.word_count = FRAME_WIDTH * 3; + + params->dsi.PLL_CLOCK = 270; +} + +static void lcm_init_lcm(void) +{ +#ifdef BUILD_LK + printf("[LK/LCM] lcm_init() enter\n"); + + lcm_set_gpio_output(GPIO_LCM_RST, GPIO_OUT_ONE); + MDELAY(20); + + lcm_set_gpio_output(GPIO_LCD_PWR_EN, GPIO_OUT_ONE); + MDELAY(20); + +// lcm_set_gpio_output(GPIO_LCD_BIAS_ENP_PIN, GPIO_OUT_ONE); +// MDELAY(20); + + lcm_set_gpio_output(GPIO_LCM_RST, GPIO_OUT_ZERO); + MDELAY(10); + + lcm_set_gpio_output(GPIO_LCM_RST, GPIO_OUT_ONE); + MDELAY(10); + + lcm_set_gpio_output(GPIO_LCM_RST, GPIO_OUT_ZERO); + MDELAY(120); + + init_lcm_registers(); +#else + pr_debug("[Kernel/LCM] lcm_init() enter\n"); +#endif +} + +void lcm_suspend(void) +{ +#ifndef BUILD_LK + pr_debug("[Kernel/LCM] lcm_suspend() enter\n"); + + lcm_set_gpio_output(LCD_RST_PIN, GPIO_OUT_ZERO); + MDELAY(5); + + push_table(lcm_suspend_setting, + sizeof(lcm_suspend_setting) / sizeof(struct LCM_setting_table), 1); + + lcm_set_gpio_output(LCD_PWR_BIAS_ENP_PIN, GPIO_OUT_ZERO); + MDELAY(10); + + lcm_set_gpio_output(LCD_PWR_EN_PIN, GPIO_OUT_ZERO); +#endif +} + +void lcm_resume(void) +{ +#ifndef BUILD_LK + lcm_set_gpio_output(LCD_PWR_EN_PIN, GPIO_OUT_ONE); + MDELAY(20); + + lcm_set_gpio_output(LCD_PWR_BIAS_ENP_PIN, GPIO_OUT_ONE); + MDELAY(20); + + lcm_set_gpio_output(LCD_RST_PIN, GPIO_OUT_ZERO); + MDELAY(10); + + lcm_set_gpio_output(LCD_RST_PIN, GPIO_OUT_ONE); + MDELAY(10); + + lcm_set_gpio_output(LCD_RST_PIN, GPIO_OUT_ZERO); + MDELAY(120); + + init_lcm_registers(); +#endif +} + +#if (LCM_DSI_CMD_MODE) +static void lcm_update(unsigned int x, unsigned int y, unsigned int width, unsigned int height) +{ + unsigned int x0 = x; + unsigned int y0 = y; + unsigned int x1 = x0 + width - 1; + unsigned int y1 = y0 + height - 1; + + unsigned char x0_MSB = ((x0 >> 8) & 0xFF); + unsigned char x0_LSB = (x0 & 0xFF); + unsigned char x1_MSB = ((x1 >> 8) & 0xFF); + unsigned char x1_LSB = (x1 & 0xFF); + unsigned char y0_MSB = ((y0 >> 8) & 0xFF); + unsigned char y0_LSB = (y0 & 0xFF); + unsigned char y1_MSB = ((y1 >> 8) & 0xFF); + unsigned char y1_LSB = (y1 & 0xFF); + + unsigned int data_array[16]; + + data_array[0] = 0x00053902; + data_array[1] = (x1_MSB << 24) | (x0_LSB << 16) | (x0_MSB << 8) | 0x2a; + data_array[2] = (x1_LSB); + dsi_set_cmdq(data_array, 3, 1); + + data_array[0] = 0x00053902; + data_array[1] = (y1_MSB << 24) | (y0_LSB << 16) | (y0_MSB << 8) | 0x2b; + data_array[2] = (y1_LSB); + dsi_set_cmdq(data_array, 3, 1); + + data_array[0] = 0x002c3909; + dsi_set_cmdq(data_array, 1, 0); +} +#endif + +LCM_DRIVER jd9365_hd720_dsi_lcm_drv = { + .name = "jd9365_hd720_dsi", + .set_util_funcs = lcm_set_util_funcs, + .get_params = lcm_get_params, + .init = lcm_init_lcm, + .suspend = lcm_suspend, + .resume = lcm_resume, +}; diff --git a/drivers/misc/mediatek/lcm/jd9522_hd720_dsi_vdo_qc/Makefile b/drivers/misc/mediatek/lcm/jd9522_hd720_dsi_vdo_qc/Makefile new file mode 100644 index 00000000..7fdc83d4 --- /dev/null +++ b/drivers/misc/mediatek/lcm/jd9522_hd720_dsi_vdo_qc/Makefile @@ -0,0 +1,9 @@ +# +# Makefile for misc devices that really don't fit anywhere else. +# +# include $(srctree)/drivers/misc/mediatek/Makefile.custom + +obj-y += jd9522_hd720_dsi_vdo_qc.o + +ccflags-$(CONFIG_MTK_LCM) += -I$(srctree)/drivers/misc/mediatek/lcm/inc + diff --git a/drivers/misc/mediatek/lcm/jd9522_hd720_dsi_vdo_qc/jd9522_hd720_dsi_vdo_qc.c b/drivers/misc/mediatek/lcm/jd9522_hd720_dsi_vdo_qc/jd9522_hd720_dsi_vdo_qc.c new file mode 100644 index 00000000..06837714 --- /dev/null +++ b/drivers/misc/mediatek/lcm/jd9522_hd720_dsi_vdo_qc/jd9522_hd720_dsi_vdo_qc.c @@ -0,0 +1,590 @@ +/* + * Copyright (C) 2015 MediaTek Inc. + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifdef BUILD_LK +#include +#include +#include +#include +#include +#include +#elif defined(BUILD_UBOOT) +#include +#else +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#endif + +#ifdef CONFIG_OF +#include +#endif + +#include "lcm_drv.h" + +#ifndef BUILD_LK +static struct regulator *lcm_vgp; +static unsigned int LCD_RST_PIN; +static unsigned int LCD_PWR_EN_PIN; +static unsigned int LCD_PWR_BIAS_ENP_PIN; + +/* get LDO supply */ +static int lcm_get_vgp_supply(struct device *dev) +{ + int ret; + struct regulator *lcm_vgp_ldo; + + pr_debug("LCM: lcm_get_vgp_supply is going\n"); + + lcm_vgp_ldo = devm_regulator_get(dev, "reg-lcm"); + if (IS_ERR(lcm_vgp_ldo)) { + ret = PTR_ERR(lcm_vgp_ldo); + pr_debug("failed to get reg-lcm LDO\n"); + return ret; + } + + pr_debug("LCM: lcm get supply ok.\n"); + + /* get current voltage settings */ + ret = regulator_get_voltage(lcm_vgp_ldo); + pr_debug("lcm LDO voltage = %d in LK stage\n", ret); + + lcm_vgp = lcm_vgp_ldo; + + return ret; +} + +int lcm_vgp_supply_enable(void) +{ + int ret; + unsigned int volt; + + pr_debug("LCM: lcm_vgp_supply_enable\n"); + + if (lcm_vgp == NULL) + return 0; + + pr_debug("LCM: set regulator voltage lcm_vgp voltage to 1.8V\n"); + /* set voltage to 1.8V */ + ret = regulator_set_voltage(lcm_vgp, 1800000, 1800000); + if (ret != 0) { + pr_debug("LCM: lcm failed to set lcm_vgp voltage\n"); + return ret; + } + + /* get voltage settings again */ + volt = regulator_get_voltage(lcm_vgp); + if (volt == 1800000) + pr_debug("LCM: check regulator voltage=1800000 pass!\n"); + else + pr_debug("LCM: check regulator voltage=1800000 fail! (voltage: %d)\n", volt); + + ret = regulator_enable(lcm_vgp); + if (ret != 0) { + pr_debug("LCM: Failed to enable lcm_vgp\n"); + return ret; + } + + return ret; +} + +int lcm_vgp_supply_disable(void) +{ + int ret = 0; + unsigned int isenable; + + if (lcm_vgp == NULL) + return 0; + + /* disable regulator */ + isenable = regulator_is_enabled(lcm_vgp); + + pr_debug("LCM: lcm query regulator enable status[%d]\n", isenable); + + if (isenable) { + ret = regulator_disable(lcm_vgp); + if (ret != 0) { + pr_debug("LCM: lcm failed to disable lcm_vgp\n"); + return ret; + } + /* verify */ + isenable = regulator_is_enabled(lcm_vgp); + if (!isenable) + pr_debug("LCM: lcm regulator disable pass\n"); + } + + return ret; +} + +void lcm_request_gpio_control(struct device *dev) +{ + LCD_RST_PIN = of_get_named_gpio(dev->of_node, "lcd_rst_pin", 0); + gpio_request(LCD_RST_PIN, "LCD_RST_PIN"); + + LCD_PWR_EN_PIN = of_get_named_gpio(dev->of_node, "lcd_pwr_en_pin", 0); + gpio_request(LCD_PWR_EN_PIN, "LCD_PWR_EN_PIN"); + + LCD_PWR_BIAS_ENP_PIN = of_get_named_gpio(dev->of_node, "lcd_pwr_bias_enp_pin", 0); + gpio_request(LCD_PWR_BIAS_ENP_PIN, "LCD_PWR_BIAS_ENP_PIN"); +} + +static int lcm_driver_probe(struct device *dev, void const *data) +{ + lcm_request_gpio_control(dev); + lcm_get_vgp_supply(dev); + lcm_vgp_supply_enable(); + + return 0; +} + +static const struct of_device_id lcm_platform_of_match[] = { + { + .compatible = "jdi,jd9522_hd720_dsi_vdo_qc", + .data = 0, + }, { + /* sentinel */ + } +}; + +MODULE_DEVICE_TABLE(of, platform_of_match); + +static int lcm_platform_probe(struct platform_device *pdev) +{ + const struct of_device_id *id; + + id = of_match_node(lcm_platform_of_match, pdev->dev.of_node); + if (!id) + return -ENODEV; + + return lcm_driver_probe(&pdev->dev, id->data); +} + +static struct platform_driver lcm_driver = { + .probe = lcm_platform_probe, + .driver = { + .name = "jd9522_hd720_dsi_vdo_qc", + .owner = THIS_MODULE, + .of_match_table = lcm_platform_of_match, + }, +}; + +static int __init lcm_init(void) +{ + if (platform_driver_register(&lcm_driver)) { + pr_debug("LCM: failed to register this driver!\n"); + return -ENODEV; + } + + return 0; +} + +static void __exit lcm_exit(void) +{ + platform_driver_unregister(&lcm_driver); +} + +late_initcall(lcm_init); +module_exit(lcm_exit); +MODULE_AUTHOR("mediatek"); +MODULE_DESCRIPTION("LCM display subsystem driver"); +MODULE_LICENSE("GPL"); +#endif + +/* --------------------------------------------------------------------------- */ +/* Local Constants */ +/* --------------------------------------------------------------------------- */ +#define LCM_DSI_CMD_MODE 0 +#define FRAME_WIDTH (720) +#define FRAME_HEIGHT (1280) +//#define FRAME_WIDTH (540) +//#define FRAME_HEIGHT (960) + +#define GPIO_OUT_ONE 1 +#define GPIO_OUT_ZERO 0 + +#ifdef GPIO_LCM_RST +#define GPIO_LCD_RST GPIO_LCM_RST +#endif + +#ifdef GPIO_LCM_PWR_EN +#define GPIO_LCD_PWR_EN GPIO_LCM_PWR_EN +#else +#define GPIO_LCD_PWR_EN 0xFFFFFFFF +#endif + +//#ifdef GPIO_LCD_BIAS_ENP_PIN +//#define GPIO_LCD_BIAS_ENP GPIO_LCD_BIAS_ENP_PIN +//#endif + +static LCM_UTIL_FUNCS lcm_util; + +#define SET_RESET_PIN(v) (lcm_util.set_reset_pin((v))) + +#define UDELAY(n) (lcm_util.udelay(n)) +#define MDELAY(n) (lcm_util.mdelay(n)) + +/* --------------------------------------------------------------------------- */ +/* Local Functions */ +/* --------------------------------------------------------------------------- */ +#define dsi_set_cmdq_V2(cmd, count, ppara, force_update) lcm_util.dsi_set_cmdq_V2(cmd, count, ppara, force_update) +#define dsi_set_cmdq(pdata, queue_size, force_update) lcm_util.dsi_set_cmdq(pdata, queue_size, force_update) +#define wrtie_cmd(cmd) lcm_util.dsi_write_cmd(cmd) +#define write_regs(addr, pdata, byte_nums) lcm_util.dsi_write_regs(addr, pdata, byte_nums) +#define read_reg(cmd) lcm_util.dsi_dcs_read_lcm_reg(cmd) +#define read_reg_v2(cmd, buffer, buffer_size) lcm_util.dsi_dcs_read_lcm_reg_v2(cmd, buffer, buffer_size) +/* --------------------------------------------------------------------------- */ +/* Local Constants */ +/* --------------------------------------------------------------------------- */ +#define REGFLAG_DELAY 0xFC +#define REGFLAG_END_OF_TABLE 0xFD /* END OF REGISTERS MARKER */ +//#define REGFLAG_END_OF_TABLE 0xFF /* END OF REGISTERS MARKER */ + +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef FALSE +#define FALSE 0 +#endif + +/* --------------------------------------------------------------------------- */ +/* Local Variables */ +/* --------------------------------------------------------------------------- */ +static void lcm_set_gpio_output(unsigned int GPIO, unsigned int output) +{ + if (GPIO == 0xFFFFFFFF) { +#ifdef BUILD_LK + printf("[LK/LCM] GPIO_LCD_PWR_EN = 0x%x\n", GPIO_LCD_PWR_EN); +// printf("[LK/LCM] GPIO_LCD_BIAS_ENP_PIN = 0x%x\n", GPIO_LCD_BIAS_ENP_PIN); + printf("[LK/LCM] GPIO_LCM_RST = 0x%x\n", GPIO_LCD_RST); +#else + pr_debug("[Kernel/LCM] GPIO_LCD_PWR_EN = 0x%x\n", LCD_PWR_EN_PIN); + pr_debug("[Kernel/LCM] GPIO_LCD_BIAS_ENP_PIN = 0x%x\n", LCD_PWR_BIAS_ENP_PIN); + pr_debug("[Kernel/LCM] GPIO_LCM_RST = 0x%x\n", LCD_RST_PIN); +#endif + return; + } +#ifdef BUILD_LK + mt_set_gpio_mode(GPIO, GPIO_MODE_00); + mt_set_gpio_dir(GPIO, GPIO_DIR_OUT); + mt_set_gpio_out(GPIO, (output > 0) ? GPIO_OUT_ONE : GPIO_OUT_ZERO); +#else + gpio_direction_output(GPIO, output); + gpio_set_value(GPIO, output); +#endif +} + +struct LCM_setting_table { + unsigned char cmd; + unsigned char count; + unsigned char para_list[64]; +}; + +#ifndef BUILD_LK +static struct LCM_setting_table lcm_suspend_setting[] = { + {0x28, 0, {} }, + {0x10, 0, {} }, + {REGFLAG_DELAY, 120, {} }, + {REGFLAG_END_OF_TABLE, 0x00, {} } +}; +#endif + +static struct LCM_setting_table lcm_initialization_setting[] = { + {0XDF, 3, {0X95, 0X22, 0XB7}}, + {0XB0, 7, {0X01, 0X23, 0X06, 0X88, 0X64, 0X06, 0X00}}, + {0XB2, 2, {0X01, 0X14}}, + {0XB3, 2, {0X01, 0X14}}, + {0XB5, 3, {0X08, 0X00, 0X64}}, + {0XB7, 6, {0X00, 0XC7, 0X01, 0X00, 0XC7, 0X01}}, + {0XB9, 3, {0X22, 0XFC, 0X33}}, + {0XCF, 3, {0X30, 0X24, 0X33}}, + {0XC0, 2, {0X04, 0X13}}, + {0XCC, 1, {0X31}}, + {0XC1, 3, {0X00, 0X10, 0X00}}, + {0XC3, 22, {0X3C, 0X03, 0X03, 0X03, 0X03, 0X0B, 0X1C, 0X22, 0X33, 0X39, 0X4A, 0X07, 0X05, 0X05, 0X05, 0X00, 0X01, 0X00, 0X01, 0X01, 0X02, 0X4F}}, + {0XC4, 6, {0X36, 0XC0, 0X56, 0X08, 0X05, 0X16}}, + {0XBB, 8, {0X02, 0X01, 0X24, 0X5A, 0X4A, 0X37, 0X1E, 0X06}}, + {0XC8, 47, {0X00, 0XFF, 0XF0, 0XE6, 0XD6, 0XC5, 0XB2, 0XBB, 0XA5, 0X9A, 0X7A, 0X86, 0X7B, 0X72, 0X69, 0X50, 0X65, 0X51, 0X46, 0X34, 0X20, 0X17, 0X14, 0X11, 0XFF, 0XF0, 0XE6, 0XD6, 0XC5, 0XB2, 0XBB, 0XA5, 0X9A, 0X7A, 0X86, 0X7B, 0X72, 0X69, 0X50, 0X65, 0X51, 0X46, 0X34, 0X20, 0X17, 0X14, 0X11}}, + {0XC9, 47, {0X00, 0XFF, 0XF0, 0XE6, 0XD6, 0XC5, 0XB2, 0XBB, 0XA5, 0X9A, 0X7A, 0X86, 0X7B, 0X72, 0X69, 0X50, 0X65, 0X51, 0X46, 0X34, 0X20, 0X17, 0X14, 0X11, 0XFF, 0XF0, 0XE6, 0XD6, 0XC5, 0XB2, 0XBB, 0XA5, 0X9A, 0X7A, 0X86, 0X7B, 0X72, 0X69, 0X50, 0X65, 0X51, 0X46, 0X34, 0X20, 0X17, 0X14, 0X11}}, + {0XCA, 47, {0X00, 0XFF, 0XF0, 0XE6, 0XD6, 0XC5, 0XB2, 0XBB, 0XA5, 0X9A, 0X7A, 0X86, 0X7B, 0X72, 0X69, 0X50, 0X65, 0X51, 0X46, 0X34, 0X20, 0X17, 0X14, 0X11, 0XFF, 0XF0, 0XE6, 0XD6, 0XC5, 0XB2, 0XBB, 0XA5, 0X9A, 0X7A, 0X86, 0X7B, 0X72, 0X69, 0X50, 0X65, 0X51, 0X46, 0X34, 0X20, 0X17, 0X14, 0X11}}, + {0XBC, 2, {0X01, 0X44}}, + {0XD0, 21, {0X00, 0X1F, 0X07, 0X05, 0XD5, 0X1F, 0X1E, 0X01, 0X1F, 0X1F, 0X1F, 0X1F, 0X1F, 0X1F, 0X23, 0X22, 0X21, 0X00, 0X00, 0XE0, 0X4E}}, + {0XD1, 21, {0X00, 0X1F, 0X06, 0X04, 0XD5, 0X1F, 0X1E, 0X00, 0X1F, 0X1F, 0X1F, 0X1F, 0X1F, 0X1F, 0X23, 0X22, 0X21, 0X00, 0X00, 0XE0, 0X4E}}, + {0XD2, 21, {0X00, 0X1F, 0X04, 0X06, 0X15, 0X1E, 0X1F, 0X00, 0X1F, 0X1F, 0X1F, 0X1F, 0X1F, 0X1F, 0X23, 0X22, 0X21, 0X00, 0X00, 0XE0, 0X4E}}, + {0XD3, 21, {0X00, 0X1F, 0X05, 0X07, 0X15, 0X1E, 0X1F, 0X01, 0X1F, 0X1F, 0X1F, 0X1F, 0X1F, 0X1F, 0X23, 0X22, 0X21, 0X00, 0X00, 0XE0, 0X4E}}, + {0XD4, 32, {0X01, 0X10, 0X00, 0X05, 0X03, 0X20, 0X01, 0X02, 0X44, 0X12, 0X37, 0X87, 0X30, 0X01, 0X02, 0X05, 0X8A, 0X30, 0X04, 0X02, 0X50, 0X04, 0X00, 0X01, 0X00, 0X00, 0X01, 0X00, 0X05, 0X05, 0X02, 0X02}}, + {0XD5, 33, {0X40, 0X00, 0X00, 0X00, 0X00, 0X00, 0X00, 0XC0, 0X30, 0X0A, 0X0A, 0X66, 0X02, 0X07, 0X50, 0X00, 0X07, 0X94, 0X00, 0XA0, 0X00, 0X04, 0X00, 0X00, 0X04, 0X34, 0X03, 0XC0, 0X00, 0X02, 0X06, 0X08, 0X08}}, + {0XE6, 2, {0X00, 0X10}}, + {0XBE, 2, {0X5A, 0X63}}, + {0XDD, 4, {0X2A, 0XA3, 0X2A, 0XE9}}, + {0XDE, 1, {0X02}}, + {0XC1, 4, {0X04, 0X10, 0X43, 0X00}}, + {0XC2, 8, {0X00, 0X20, 0X38, 0X78, 0X9B, 0X2B, 0X56, 0X00}}, + {0XDE, 1, {0X01}}, + {0XC8, 1, {0X03}}, + {0XDE, 1, {0X00}}, + {0X35, 1, {0X00}}, + {0X11, 0, {}}, + {REGFLAG_DELAY, 150, {}}, + {0X29, 0, {}}, + {REGFLAG_DELAY, 50, {}}, + {REGFLAG_END_OF_TABLE, 0, {}} +}; + +static void dsi_send_cmdq_tinno(unsigned cmd, unsigned char count, unsigned char *para_list, + unsigned char force_update) +{ + unsigned int item[16]; + unsigned char dsi_cmd = (unsigned char)cmd; + unsigned char dc; + int index = 0, length = 0; + + memset(item, 0, sizeof(item)); + if (count + 1 > 60) + return; + + if (count == 0) { + item[0] = 0x0500 | (dsi_cmd << 16); + length = 1; + } else if (count == 1) { + item[0] = 0x1500 | (dsi_cmd << 16) | (para_list[0] << 24); + length = 1; + } else { + item[0] = 0x3902 | ((count + 1) << 16); /* Count include command. */ + ++length; + while (1) { + if (index == count + 1) + break; + if (index == 0) + dc = cmd; + else + dc = para_list[index - 1]; + /* an item make up of 4data. */ + item[index / 4 + 1] |= (dc << (8 * (index % 4))); + if (index % 4 == 0) + ++length; + ++index; + } + } + + dsi_set_cmdq(item, length, force_update); +} + + +static void push_table(struct LCM_setting_table *table, unsigned int count, + unsigned char force_update) +{ + unsigned int i; + unsigned cmd; + + for (i = 0; i < count; i++) { + cmd = table[i].cmd; + switch (cmd) { + case REGFLAG_DELAY: + MDELAY(table[i].count); + break; + + case REGFLAG_END_OF_TABLE: + break; + + default: + break; +// dsi_send_cmdq_tinno(cmd, table[i].count, table[i].para_list, force_update); //this can comment out + dsi_set_cmdq_V2(cmd, table[i].count, table[i].para_list, force_update); + } + } +} + +static void init_lcm_registers(void) +{ + push_table(lcm_initialization_setting, + sizeof(lcm_initialization_setting) / sizeof(struct LCM_setting_table), 1); +} + +/* --------------------------------------------------------------------------- */ +/* LCM Driver Implementations */ +/* --------------------------------------------------------------------------- */ +static void lcm_set_util_funcs(const LCM_UTIL_FUNCS *util) +{ + memcpy(&lcm_util, util, sizeof(LCM_UTIL_FUNCS)); +} + +static void lcm_get_params(LCM_PARAMS *params) +{ + memset(params, 0, sizeof(LCM_PARAMS)); + + params->type = LCM_TYPE_DSI; + + params->width = FRAME_WIDTH; + params->height = FRAME_HEIGHT; +// params->density = 213; + +#if (LCM_DSI_CMD_MODE) + params->dsi.mode = CMD_MODE; +#else + params->dsi.mode = SYNC_PULSE_VDO_MODE; +#endif + + /* DSI */ + /* Command mode setting */ + params->dsi.LANE_NUM = LCM_FOUR_LANE; + /* The following defined the fomat for data coming from LCD engine. */ + params->dsi.data_format.color_order = LCM_COLOR_ORDER_RGB; + params->dsi.data_format.trans_seq = LCM_DSI_TRANS_SEQ_MSB_FIRST; + params->dsi.data_format.padding = LCM_DSI_PADDING_ON_LSB; + params->dsi.data_format.format = LCM_DSI_FORMAT_RGB888; + + params->dsi.intermediat_buffer_num = 2; + params->dsi.PS = LCM_PACKED_PS_24BIT_RGB888; + +//#ifdef BUILD_LK +// params->dsi.esd_check_enable = 1; +// params->dsi.customization_esd_check_enable = 1; +// params->dsi.lcm_esd_check_table[0].cmd = 0x0A; +// params->dsi.lcm_esd_check_table[0].count = 1; +// params->dsi.lcm_esd_check_table[0].para_list[0] = 0x9c; +//#endif + params->dsi.vertical_sync_active = 4; + params->dsi.vertical_backporch = 4; + params->dsi.vertical_frontporch = 16; + params->dsi.vertical_active_line = FRAME_HEIGHT; + + params->dsi.horizontal_sync_active = 55; + params->dsi.horizontal_backporch = 53; + params->dsi.horizontal_frontporch = 24; + params->dsi.horizontal_active_pixel = FRAME_WIDTH; + + /* video mode timing */ + params->dsi.word_count = FRAME_WIDTH * 3; + + params->dsi.PLL_CLOCK = 270; +} + +static void lcm_init_lcm(void) +{ +#ifdef BUILD_LK + printf("[LK/LCM] lcm_init() enter\n"); + + lcm_set_gpio_output(GPIO_LCM_RST, GPIO_OUT_ONE); + MDELAY(20); + + lcm_set_gpio_output(GPIO_LCD_PWR_EN, GPIO_OUT_ONE); + MDELAY(20); + +// lcm_set_gpio_output(GPIO_LCD_BIAS_ENP_PIN, GPIO_OUT_ONE); +// MDELAY(20); + + lcm_set_gpio_output(GPIO_LCM_RST, GPIO_OUT_ZERO); + MDELAY(10); + + lcm_set_gpio_output(GPIO_LCM_RST, GPIO_OUT_ONE); + MDELAY(10); + + lcm_set_gpio_output(GPIO_LCM_RST, GPIO_OUT_ZERO); + MDELAY(120); + + init_lcm_registers(); +#else + pr_debug("[Kernel/LCM] lcm_init() enter\n"); +#endif +} + +void lcm_suspend(void) +{ +#ifndef BUILD_LK + pr_debug("[Kernel/LCM] lcm_suspend() enter\n"); + + lcm_set_gpio_output(LCD_RST_PIN, GPIO_OUT_ZERO); + MDELAY(5); + + push_table(lcm_suspend_setting, + sizeof(lcm_suspend_setting) / sizeof(struct LCM_setting_table), 1); + + lcm_set_gpio_output(LCD_PWR_BIAS_ENP_PIN, GPIO_OUT_ZERO); + MDELAY(10); + + lcm_set_gpio_output(LCD_PWR_EN_PIN, GPIO_OUT_ZERO); +#endif +} + +void lcm_resume(void) +{ +#ifndef BUILD_LK + lcm_set_gpio_output(LCD_PWR_EN_PIN, GPIO_OUT_ONE); + MDELAY(20); + + lcm_set_gpio_output(LCD_PWR_BIAS_ENP_PIN, GPIO_OUT_ONE); + MDELAY(20); + + lcm_set_gpio_output(LCD_RST_PIN, GPIO_OUT_ZERO); + MDELAY(10); + + lcm_set_gpio_output(LCD_RST_PIN, GPIO_OUT_ONE); + MDELAY(10); + + lcm_set_gpio_output(LCD_RST_PIN, GPIO_OUT_ZERO); + MDELAY(120); + + init_lcm_registers(); +#endif +} + +#if (LCM_DSI_CMD_MODE) +static void lcm_update(unsigned int x, unsigned int y, unsigned int width, unsigned int height) +{ + unsigned int x0 = x; + unsigned int y0 = y; + unsigned int x1 = x0 + width - 1; + unsigned int y1 = y0 + height - 1; + + unsigned char x0_MSB = ((x0 >> 8) & 0xFF); + unsigned char x0_LSB = (x0 & 0xFF); + unsigned char x1_MSB = ((x1 >> 8) & 0xFF); + unsigned char x1_LSB = (x1 & 0xFF); + unsigned char y0_MSB = ((y0 >> 8) & 0xFF); + unsigned char y0_LSB = (y0 & 0xFF); + unsigned char y1_MSB = ((y1 >> 8) & 0xFF); + unsigned char y1_LSB = (y1 & 0xFF); + + unsigned int data_array[16]; + + data_array[0] = 0x00053902; + data_array[1] = (x1_MSB << 24) | (x0_LSB << 16) | (x0_MSB << 8) | 0x2a; + data_array[2] = (x1_LSB); + dsi_set_cmdq(data_array, 3, 1); + + data_array[0] = 0x00053902; + data_array[1] = (y1_MSB << 24) | (y0_LSB << 16) | (y0_MSB << 8) | 0x2b; + data_array[2] = (y1_LSB); + dsi_set_cmdq(data_array, 3, 1); + + data_array[0] = 0x002c3909; + dsi_set_cmdq(data_array, 1, 0); +} +#endif + +LCM_DRIVER jd9522_hd720_dsi_vdo_qc_lcm_drv = { + .name = "jd9522_hd720_dsi_vdo_qc", + .set_util_funcs = lcm_set_util_funcs, + .get_params = lcm_get_params, + .init = lcm_init_lcm, + .suspend = lcm_suspend, + .resume = lcm_resume, +}; diff --git a/drivers/misc/mediatek/lcm/mt65xx_lcm_list.c b/drivers/misc/mediatek/lcm/mt65xx_lcm_list.c index 809fb6bc..b96e2c3a 100644 --- a/drivers/misc/mediatek/lcm/mt65xx_lcm_list.c +++ b/drivers/misc/mediatek/lcm/mt65xx_lcm_list.c @@ -19,6 +19,8 @@ #define LCD_DEBUG(fmt, args...) pr_debug("[KERNEL/LCM]"fmt, ##args) #endif +extern LCM_DRIVER jd9522_hd720_dsi_vdo_qc_lcm_drv; +extern LCM_DRIVER jd9365_hd720_dsi_lcm_drv; extern LCM_DRIVER nt35521_hd720_dsi_video_xld_lcm_drv; extern LCM_DRIVER rm68200_hd720_dsi_vdo_jxd_lcm_drv; extern LCM_DRIVER hx8394d_hd720_dsi_vdo_cmi_lcm_drv; @@ -46,10 +48,18 @@ extern LCM_DRIVER rm67200_fhd_dsi_vdo_wcl_lcm_drv; extern LCM_DRIVER hdmi_1280x720_dsi_vdo_ry_lcm_drv; LCM_DRIVER *lcm_driver_list[] = { +#if defined(JD9365_HD720_DSI) + &jd9365_hd720_dsi_lcm_drv, +#endif + +#if defined(JD9522_HD720_DSI_VDO_QC) + &jd9522_hd720_dsi_vdo_qc_lcm_drv, +#endif + #if defined(RM67200_FHD_DSI_VDO_WCL) &rm67200_fhd_dsi_vdo_wcl_lcm_drv, #endif - + #if defined(HDMI_1280X720_DSI_VDO_RY) &hdmi_1280x720_dsi_vdo_ry_lcm_drv, #endif diff --git a/drivers/misc/mediatek/lcm/mt65xx_lcm_list.h b/drivers/misc/mediatek/lcm/mt65xx_lcm_list.h index c7ccc11c..05e9c93b 100644 --- a/drivers/misc/mediatek/lcm/mt65xx_lcm_list.h +++ b/drivers/misc/mediatek/lcm/mt65xx_lcm_list.h @@ -6,6 +6,8 @@ #if defined(MTK_LCM_DEVICE_TREE_SUPPORT) extern LCM_DRIVER lcm_common_drv; #else +extern LCM_DRIVER jd9522_hd720_dsi_vdo_qc_lcm_drv; +extern LCM_DRIVER jd9365_hd720_dsi_lcm_drv; extern LCM_DRIVER otm1282a_hd720_dsi_vdo_60hz_lcm_drv; extern LCM_DRIVER otm1282a_hd720_dsi_vdo_lcm_drv; extern LCM_DRIVER vvx10f008b00_wuxga_dsi_vdo_lcm_drv; diff --git a/kernel/power/tuxonice_ui.c b/kernel/power/tuxonice_ui.c index fc3ac655..cdcc531c 100644 --- a/kernel/power/tuxonice_ui.c +++ b/kernel/power/tuxonice_ui.c @@ -124,7 +124,7 @@ void toi_early_boot_message(int message_detail, int default_answer, char *warnin say("BIG FAT WARNING!! %s", local_printf_buf); switch (message_detail) { case 0: - say("If you continue booting, note that any image WILL NOT BE REMOVED") + say("If you continue booting, note that any image WILL NOT BE REMOVED"); /* TuxOnIce is unable to do so because the appropriate modules aren't loaded. * You should manually remove the image to avoid any possibility of corrupting * your filesystem(s) later.